1.9. STATus Subsystem

Status commands let you determine the condition of the MagnaDC power supply at any time, grouping together multiple feedback parameters into one returned value.

1.9.1. *CLS

This command clears all status register (ESR, STB and error queue).

Command Syntax:

*CLS

Parameters:

None

Examples:

*CLS

Return Param:

None

*RST Value:

N/A

1.9.2. *ESE

This command programs the Event Status Enable Register (ESE). The programming determines which events of the Event Status Register (ESR) set the Event Status Bit (ESB) of the Status Byte Register (STB). A “1” in the bit position enables the corresponding event. All of the enabled events of the ESE are logically OR’d to cause the ESB of the STB to be set.

Command Syntax:

*ESE <NR1>

Parameters:

Register Bit Position

Examples:

*ESE 255

Query Syntax:

*ESE?

Return Param:

<NR1>

*RST Value:

N/A

1.9.3. *ESR?

This query reads the Event Status Register (ESR). After reading the ESR, the register is cleared. The bit configuration of the ESR is the same as the Event Status Enable Register (*ESE). The return parameter is weighted as shown in table below.

The Power On Bit (PON) is set every time the MagnaDC power supply is reset. It can be used to detect a power outage or MagnaDC power supply reset.

Command Syntax:

*ESR?

Parameters:

None

Examples:

*ESR?

Return Param:

<NR1>

*RST Value:

N/A

Event Status Register

Bit

Weight

Abbreviation

Description

0

1

OPC

Operation Complete

1

2

NU

Not Used

2

4

QYE

Query Error

3

8

DDE

Device Dependent Error

4

16

EXE

Execution Error

5

32

CME

Command Error

6

64

NU

Not Used

7

128

PON

Power On Event, 1 after power on

1.9.4. *IDN?

This query requests MagnaDC power supply to identify itself, returning a string composed of four fields separated by commas.

Query Syntax:

*IDN?

Examples:

*IDN?

Return Param:

Company Name, MagnaDC power supply Model, Serial Number, Firmware Version

Return Example:

Magna-Power Electronics Inc., <model>, 1201-0001, 0.029

*RST Value:

N/A

1.9.5. *OPC

Note

This command is only available with the IEEE-488 GPIB (+GPIB) option.

This command clears the operation complete bit found in the event status register (ESR). Should be used in application programming when delay exists between sending a SCPI command and the execution of the command. When all commands have completed, the OPC bit gets set back to 1.

Query Syntax:

*OPC?

Examples:

*OPC

Return Param:

<NR1>

*RST Value:

N/A

1.9.6. *RST

This command resets the various settings and functions in the MagnaDC power supply to their factory default state. This command is commonly used in initialization routines to restore the MagnaDC power supply to a known configuration. Factory default settings for each command are indicated in the description for respective SCPI commands. SCPI commands with *RST Value indicated as N/A either are not affected by the *RST or do not have a parameter that can be changed.

Command Syntax:

*RST

Parameters:

None

Examples:

*RST

*RST Value:

N/A

1.9.7. *SRE

This command sets the Service Request Enable Register (SRE). This register, defined in the table “Service Request Enable Register”, determines which bits from the Status Byte Register (see *STB for its bit configuration) are allowed to set the Service Request (RQS) Bit. A 1 in any SRE bit position enables the corresponding Status Byte Register bit. All Status Byte Register enabled bits are then logically OR’d and placed in bit 6 of the Status Byte Register. When *SRE is cleared (by programming it with 0), the power supply cannot generate a service request to the controller.

Command Syntax:

*SRE

Parameters:

Register Bit Position

Examples:

*SRE 20

Query Syntax:

*SRE?

Return Param:

<NR1>

*RST Value:

N/A

Service Request Enable Register

Bit

Weight

Abbreviation

Description

0

1

NU

Not Used

1

2

NU

Not Used

2

4

NU

Not Used

3

8

QUES

Questionable Status Bit

4

16

MAV

Message Available Bit

5

32

ESB

Event Status Bit

6

64

RQS

Request Service Bit

7

128

NU

Not Used

1.9.8. *STB

This query gets the Status Byte (STB). Registers are cleared only when the signals feeding it are cleared.

Command Syntax:

*STB?

Parameters:

None

Examples:

*STB?

Return Param:

<NR1>

*RST Value:

N/A

1.9.9. STATus:OPERation:CONDition?

This query returns the value of the Operation Register which is a read-only register that holds the real-time (unlatched) condition of the operational status of the power supply. The bit configuration of the Operation Register is shown in Table 1.4.

Query Syntax:

STATus:OPERation:CONDition?

Examples:

STAT:OPER:COND?, STATUS:OPERATION:CONDITION?

Return Param:

<NR1> (Register value)

Table 1.4 Bit configuration of the Operation Register

Bit

Weight

Abbreviation

Description

0

1

ARM

Arm

1

2

SS

Soft Start

2

4

LOCK

Locked

3

8

INT

Internal Control

4

16

EXT

External Control

5

32

WTG

Interface is Waiting for Trigger

6

64

STBY

Standby

7

128

PWR

Power

8

256

CV

Constant Voltage

9

512

RSEN

Remote Sense

10

1024

CC

Constant Current

11

2048

STBY/ALM

Standby or Alarm

12

4096

NU

Not Used

1.9.10. STATus:QUEStionable:CONDition?

This query returns the value of the Questionable Register. The Questionable Register is a readonly register that holds the real-time (unlatched) condition of the questionable status of the power supply. The bit configuration of the Questionable Register is shown in Table 1.5.

Query Syntax:

STATus:QUEStionable:CONDition?

Examples:

STAT:QUES:COND?, STATUS:QUESTIONABLE:CONDITION?

Return Param:

<NR1> (Register value)

Table 1.5 Bit configuration of the Questionable Register

Bit

Weight

Abbreviation

Description

0

1

OV

Over Voltage Tripped

1

2

OC

Over Current Tripped

2

4

PB

Phase Balance Protection Tripped

3

8

PGM

Program Line Protection Tripped

4

16

OT

Over Temperature Protection Tripped

5

32

FUSE

Fuse Protection Tripped

6

64

NU

Not Used

7

128

ALM

Alarm Protection Tripped

8

256

ILOC

Interlock

9

512

REM

Remote

10

1024

NU

Not Used