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Double Pulse Testing for SiC and GaN: The High Voltage DC Bus Supply

From Curve Tracers to Nanosecond Transitions

For most of the history of power semiconductor characterization, the workhorse instrument sat quietly in the corner of the lab: the curve tracer. Tektronix introduced the first commercial curve tracer in 1955, and the legendary Type 576, introduced in 1969 and capable of sweeping 1500 volts and 20 amperes through a device under, defined how a generation of power engineers understood transistors, diodes, thyristors, and IGBTs. The 576 and its successors, the 370A/B series, remained in production into the mid-1980s and are still in active use today for failure analysis and teaching.

Curve tracers are fundamentally steady-state instruments. They sweep a voltage, measure the resulting current, and plot the I-V characteristic on a screen. For silicon MOSFETs and IGBTs switching at tens of kilohertz in yesterday’s power electronics, that was enough.

That era ended with the commercial emergence of silicon carbide (SiC) and gallium nitride (GaN) power devices. Wide bandgap (WBG) semiconductors switch at rates that turn switching loss into the dominant loss mechanism. The parameters that determine system efficiency — turn-on energy (Eon), turn-off energy (Eoff), reverse recovery energy (Err), voltage overshoot, dv/dt, di/dt — live entirely in the dynamic behavior of the device during nanosecond transitions. A curve tracer cannot see them.

The industry’s answer is the Double Pulse Test (DPT), codified in JEDEC JEP182 and the IEC 60747-8/-9 standards. DPT is now a required step in datasheet generation, converter design validation, and production-line characterization at every serious power semiconductor manufacturer.

This application note covers the fundamentals of DPT briefly, then focuses on the element most often glossed over in DPT discussions: the DC bus supply that anchors every setup, and the specific engineering decisions that go into selecting one correctly.

What DPT Measures

A double pulse test extracts the dynamic switching parameters that datasheets rely on and converter designs depend on:

  • Turn-on: turn-on delay (td,on), rise time (tr), turn-on energy (Eon), dv/dt, di/dt
  • Turn-off: turn-off delay (td,off), fall time (tf), turn-off energy (Eoff), dv/dt, di/dt
  • Reverse recovery (of the freewheeling device): reverse recovery time (trr), peak reverse recovery current (Irr), reverse recovery charge (Qrr), reverse recovery energy (Err)

These parameters feed directly into converter efficiency calculations, thermal modeling, EMI prediction, and gate drive optimization, which is why every WBG device datasheet publishes them, and why every converter designer wants to verify them on the specific parts they’re buying.

How Double Pulse Testing Works

The canonical DPT circuit is a half-bridge with an inductive load. The device under test is typically the low-side switch. The high-side device, often another MOSFET with its body diode, or a dedicated freewheeling diode, provides the current path during the freewheeling interval. A large DC-link capacitor bank supplies the pulsed energy, and a DC power supply charges the bank to the test voltage.

The three phases

A double pulse test, despite its name, has three distinct intervals.

Phase 1: Charging pulse (τc)

The DUT turns on. Current ramps up linearly in the load inductor according to:

Canonical double pulse test circuit. The DC power supply charges the bus capacitor C_B to V_DC and recharges it between shots. Q_DUT is the device under test; Q_HS is held off and its body diode provides the freewheeling current path during the pulse interval. Switching parameters (E_on, E_off, E_rr, V_DS, V_GS, I_D) are extracted from the oscilloscope captures during the second pulse.
Canonical double pulse test circuit. The DC power supply charges the bus capacitor C_B to V_DC and recharges it between shots. Q_DUT is the device under test; Q_HS is held off and its body diode provides the freewheeling current path during the pulse interval. Switching parameters (E_on, E_off, E_rr, V_DS, V_GS, I_D) are extracted from the oscilloscope captures during the second pulse.

The three phases

A double pulse test, despite its name, has three distinct intervals.

Phase 1: Charging pulse (τc)

The DUT turns on. Current ramps up linearly in the load inductor according to:

`(d i_L) / (d t) = V_(DC) / L`
(Eq 1)

The first pulse width τc is chosen to reach the target test current Itest:

`tau_c = (L * I_(test)) / V_(DC)`
(Eq 2)

At the end of this interval, the DUT turns off. This is where the first turn-off event is captured — at the target test current, with the DC bus fully charged. This is the Eoff measurement.

Phase 2: Pulse break (τoff)

The DUT is off. Inductor current circulates through the high-side freewheeling device. This interval must be long enough for switching transients to fully decay, but short enough that inductor current doesn’t drop significantly.

Phase 3 Second pulse (τon)

The DUT turns on again. Now the turn-on event is captured at the target current, with realistic di/dt conditions. Simultaneously, the freewheeling device undergoes reverse recovery, which is captured as the peak Irr spike. This is where Eon and Err are measured.

Gate drive, inductor current, and DUT voltage during the three phases. Shaded regions indicate Eoff and Eon integration windows.
Gate drive, inductor current, and DUT voltage during the three phases. Shaded regions indicate Eoff and Eon integration windows.

Switching loss and capacitor bank sizing

Switching loss is calculated by integrating the product of instantaneous voltage and current across the transition. For turn-on:

`E_(on) = int_(t_1)^(t_2) v_(DS)(t) * i_D(t) \ dt`
(Eq 3)

Eoff and Err follow the same form over their respective intervals. Integration limits are defined by JEDEC JEP182, typically at 10% voltage and current crossing thresholds. Modern oscilloscopes with DPT application software automate the calculation.

The DC-link capacitor bank must be large enough that the bus voltage stays substantially constant during the pulse. From energy balance, with small allowable droop ΔVDC:

`C_B >= (L * I_(test)^2) / (2 * V_(DC) * Delta V_(DC))`
(Eq 4)

Practical DPT setups use tens to thousands of microfarads of parallel film capacitance, arranged to minimize equivalent series inductance. This capacitor bank sizing equation also becomes an input to the power supply selection calculation.

The Commercial Landscape: Three Approaches to Building a DPT Bench

The industry has settled into three broad categories of DPT setup.

Turnkey systems

Fully-integrated, vendor-supplied packages including gate drive, fixture, measurement, analysis software, and sometimes the DC bus supply. Examples: Keysight PD1500A, Rohde & Schwarz + PE-Systems with the R&S MXO oscilloscope. Fast time-to-result and JEDEC-compliant out of the box, but with fixed voltage and current envelopes and high capital cost.

Instrument packages

A high-bandwidth oscilloscope plus an arbitrary function generator, specialized probes, and a DPT software option. Tektronix’s 4/5/6 Series B MSO with the WBG-DPT application and AFG31000 is the canonical example; Teledyne LeCroy with optical isolated probes is another. Lower cost than turnkey, and the instruments remain useful for other work, but the fixture, gate driver, capacitor bank, load inductor, and DC supply are all the user’s responsibility.

Custom / DIY test benches

Dominant at semiconductor manufacturers, research labs, and OEMs pushing the envelope on device voltage and current. Every component is selected individually to match the target test envelope. This is the only path for devices above 1700 V, high-current modules (hundreds of amperes to kiloamperes), and novel device structures where the test conditions aren’t yet standardized.

The constant across all three architectures is the DC bus supply. Every system treats it as a given. The rest of this application note covers what it actually takes to specify one correctly.

Power Supply Selection for DPT

The DC power supply in a DPT bench performs a specific and often misunderstood role. It does not source the pulsed current into the DUT directly, that energy comes from the DC-link capacitor bank. The supply’s job is to charge the capacitor bank to the test voltage and recharge it between shots, while doing so accurately, repeatably, safely, and under automated control.

That role carries specific requirements.

Voltage rating

The supply must deliver the DC bus voltage at which characterization is performed. Good practice tests WBG devices at 50–80% of their rated VDS. Practical implications:

Device rating Typical DPT bus voltage Supply rating
650 V GaN e-HEMT 400 V 500 V minimum
1200 V SiC MOSFET 800–1000 V 1000–1500 V
1700 V SiC MOSFET 1200–1400 V 1500–2000 V
3300 V SiC module 2500–2800 V 3000 V+
6500 V SiC / high-V devices 5000+ V 6000–10000 V

The trend line is unambiguous: device voltages are climbing. A DPT bench built around a 1500 V supply in 2020 cannot characterize the 3300 V devices entering volume production now.

Current capability and how to size it

This is where DC supply selection is most often misunderstood. The peak pulsed current flowing into the DUT during the test is sourced by the capacitor bank, not the supply. The supply’s job is to replenish the energy drawn from the capacitor bank between shots, equating to a much smaller current requirement for the supply than the peak pulse current.

There are two constraints to evaluate. The binding requirement is whichever is larger.

Energy balance (usually dominant). Each DPT shot transfers energy from the capacitor bank into the load inductor:

`W_(shot) = 1/2 * L * I_(test)^2`
(Eq 5)

If shots are repeated at rate fshot, the average power the supply must deliver is:

`P_(avg) = W_(shot) * f_(shot) = (L * I_(test)^2 * f_(shot)) / 2`
(Eq 6)

The minimum supply current is average power divided by bus voltage:

`I_("supply") >= P_(avg) / V_(DC) = (L * I_(test)^2 * f_(shot)) / (2 * V_(DC))`
(Eq 7)

Recharge time constraint (binding at high shot rates). The capacitor bank loses charge ΔQ = CB · ΔVDC during each shot. The supply must replace this charge in the available recharge window Trecharge, typically the shot interval minus pulse duration and measurement settling time:

`I_("supply") >= (C_B * Delta V_(DC)) / T_("recharge")`
(Eq 8)

For most laboratory characterization work, the energy-balance equation governs. For high-throughput production parametric testing, where shots are spaced milliseconds apart and capacitor banks are sized large for high test currents, the recharge constraint dominates. Calculate both and size the supply for the larger.

Example 1: 1200 V SiC MOSFET lab characterization

A typical research lab DPT setup:

`"Energy per shot: " W_"shot" = 1/2 *250*e^-6*100^2 = 1.25" J"`
`"Average power: " P_"avg" = 1.25*1 = 1.25" W"`
`"Energy-balance current: " I_"supply" >= 1.25 / 800 = 1.6" mA"`
`"Recharge constraint: " I_"supply" >= (470*e^-6*40) / 0.1 = 188" mA"`

Example 2: Production-line parametric testing

`"Energy per shot: "W_"shot" = 1/2*50*e^-6 · 200^2 = 1.0" J"`
`"Average power: "P_"avg" = 1.0 * 10 = 10" W"`
`"Energy-balance current: "I_"supply" >= 10 / 1000 = 10" mA"`
`"Recharge constraint: "I_"supply" >= (2200*e^-6 * 50) / 0.05 = 2.2" A"`

Parametric DPT characterization typically sweeps across multiple bus voltages per device, for example 400 V, 600 V, 800 V, 1000 V for a 1200 V SiC MOSFET, with DPT shots repeated at each setpoint. The supply has to move between setpoints cleanly and quickly. MagnaLINK distributed DSP digital control on the SLx Series implements programmable slew rates and fast programmable ramping with field-tunable gains across a wide range of load conditions, letting an automated sweep sequencer step through a full voltage-current-temperature matrix.

Digital commands over a network interface has inherent latency typically milliseconds, which can introduce jitter into tightly-coordinated DPT sequences. For applications where the supply's state needs to synchronize with the gate driver, AFG, and oscilloscope without going through the command layer, the SLx and Series provides a standard D-Sub User I/O with analog and digital logic. This I/O provides a hardware path for real-time feedback and control that's independent of the software command interface, allowing the supply can be wired directly into the test bench's interlock system, trigger logic, and analog measurement paths.

Automation infrastructure varies widely across the DPT customer base, including LabVIEW, Python over Ethernet, IVI drivers in TestStand, production floors running PLC controlled sequencers. The supply needs to integrate with whichever infrastructure is already in place, not force a change in it.

The SLx Series comes standard with dual USB (front and rear) and RS-485, with full SCPI and Modbus command-set support. Optional LXI TCP/IP Ethernet (+LXI) provides standard lab network control, and for environments running industrial automation, SLx additionally offers CANopen, EtherCAT, EtherNet/IP, ModbusTCP, and PROFINET as fully-integrated communication options, each with full command-set support, enabling direct control from industrial PLCs (Siemens PROFINET being particularly common in semiconductor fabs and automotive test cells). The XR Series comes standard with serial RS-232 and supports LXI TCP/IP Ethernet (+LXI) and IEEE-488 GPIB (+GPIB) as optional interfaces for broader lab instrumentation integration. National Instruments LabVIEW and IVI drivers are included with every supply.

Starting from Python–what Magna-Power uses in-house for its own test software–is straightforward the supply listens on a socket, SCPI commands are ASCII text, and a full DPT sweep scaffolding with logging takes a dozen lines:

import socket, time

# Connect to supply at lab network address, default SCPI socket port
s = socket.socket(socket.AF_INET, socket.SOCK_STREAM)
s.connect(('192.168.0.86', 50505))

# Identify and configure for remote control
s.sendall(b'*IDN?\n')
print(s.recv(4096).decode())
s.sendall(b'CONF:SOUR 0\n')

# Sweep across bus voltages for parametric DPT characterization
for v_bus in [400, 600, 800, 1000]:
    s.sendall(f'VOLT {v_bus}\n'.encode())
    s.sendall(b'OUTP:START\n')
    time.sleep(0.1)   # settle time before DPT shot
    # [trigger AFG, capture scope waveforms, calculate E_on/E_off]
    s.sendall(b'MEAS:ALL?\n')
    curr, volt, pwr = s.recv(4096).decode().split(',')
    print(f'V_bus={v_bus}: measured {float(volt):.2f} V, {float(curr):.3f} A')

s.sendall(b'OUTP:STOP\n')
s.close()

Self-protecting topology under load faults

DPT is inherently destructive testing. Devices routinely fail, and when they do, they typically short. The supply must respond to a load fault without cascading into supply damage, without injecting large reverse currents back into the capacitor bank, and without releasing stored energy in ways that propagate damage through the bench.

Every MagnaDC power supply supply is built on Magna-Power's signature current-fed power processing topology, which adds a control stage over conventional voltage-fed designs. Under fault conditions, this topology inherently limits fault energy: no fast-rising current spikes, no magnetic core saturation, and self-protecting behavior under short-circuit loads. For DPT applications, this is the first line of defense when a DUT fails: the power supply architecture itself resists the fault, rather than relying on firmware-controlled trip responses. Combined with the safety protections in the following section, the SLx Series and XR Series tolerate repeated DUT-failure events without taking the bench down.

Safety protections

DPT pushes devices to failure by design. A well-designed supply provides multiple layers of protection that together shield the supply, the bench, and the operator from the range of things that can go wrong, DUT shorts, runaway currents, overvoltage transients from the cap bank, thermal excursions, enclosure breaches, and operator errors. The protection strategy is layered rather than single-point: each mechanism operates independently, so no single failure defeats the whole system.

Programmable overvoltage trip (OVT) and overcurrent trip (OCT) are the first programmable layer. Both SLx Series and XR Series supplies provide OVT and OCT settings configurable from the front panel, User I/O, or via command interface, with trip thresholds independent of the output regulation setpoint. For DPT, OCT is typically set a modest margin above the expected recharge current so that any anomalous load behavior.

For thermal protection, distributed thermal switches monitor multiple points inside the supply, and control-integrity diagnostics watch the programming line, remote sense leads, and internal references. A fault on any of these conditions trips the supply independently of the programmable OVT/OCT settings.

A dedicated Interlock hardware input that inhibits the output when a contact loop is broken with a latching fault. The Interlock typically integrated with the test enclosure: a 5V-referenced dry-contact loop runs through the enclosure door, the fixture cover, and any other safety-critical interlocks. Opening any link disables the output. Both the SLx Series and the XR Series provide an interlock input as a standard feature; this is the baseline hardware safety layer that every DPT bench should tie into its enclosure and access controls.

A dedicated hardware emergency stop is available on the SLx Series as an additional layer. The E-stop input, when triggered by a 24V signal, creates an AC-interrupt path that bypasses all logic, processors, and control firmware. This provides a hardware-only shutdown mechanism independent of the supply's control electronics, which is useful in installations where an additional layer of hardware isolation beyond the interlock is desired.

Combined, these mechanisms let the supply tolerate repeated DUT failures — the kind of destructive testing that characterization work actually requires, without propagating damage through the bench.

    Rack Density

    DPT setups are instrument-heavy: oscilloscope, function generator, gate driver supply, thermal chamber controller, automation hardware, and the DC bus supply.

    Magna-Power's SLx Series delivers up to 10 kW at voltages to 3,000 Vdc in a single 1U chassis, where a conventional high-voltage programmable supply typically occupies 3U or more. Part of the reason is architectural: many competitive supplies include auto-ranging output stages to offer constant power across a wide envelope, which adds parts count, cost, control complexity, and physical volume. For DPT, the test voltage is set by the DUT and the average current demand is known from the sizing analysis; auto-ranging. Fixed-range supplies sized for the target device class deliver the same useful capability in less space at lower cost.

    Where DPT Is Going

    Several trends in wide bandgap device development are directly relevant to the DC supply side of the DPT bench:

    • Higher voltages. 3.3 kV SiC is in volume production. 6.5 kV and 10 kV SiC devices are moving from prototype to early commercial availability. DPT bus voltage requirements are climbing with them.
    • Higher currents and module-level testing. Characterization at hundreds of amperes to kiloamperes is increasingly common, which raises energy-per-shot and capacitor bank recharge rate — exactly the parameters that make Section 5.2’s recharge constraint dominate over energy balance.
    • Tighter integration with reliability testing. DPT is no longer standalone; it’s integrated with HTRB, HTGB, and power cycling on the same bench, which makes supply stability over long test durations a more demanding requirement.
    • Automation at the production line. Parametric DPT on every production unit is becoming routine for some manufacturers, shifting the bottleneck from measurement to capacitor bank recharge time.

    In every one of these directions, the DC bus supply requirements climb. The SLx Series at 3 kV and the XR Series at 10 kV are positioned to follow the devices upward, in the 1U and 2U form factors that keep the rest of the DPT bench buildable.


    References

    Wang, F., Zhang, Z., and Jones, E. A. (2018). Characterization of Wide Bandgap Power Semiconductor Devices. IET Energy Engineering Series, Vol. 128. Stevenage, UK: Institution of Engineering and Technology. ISBN: 978-1-78561-491-0.

    IEC 60747-9:2019, Semiconductor devices – Discrete devices – Part 9: Insulated-gate bipolar transistors (IGBTs), Edition 3.0. Geneva: International Electrotechnical Commission, November 2019.

    JEDEC Solid State Technology Association (2021). JEP182: Test Method for Continuous-Switching Evaluation of Gallium Nitride Power Conversion Devices, Version 1.0. Arlington, VA: JEDEC.

      最初发布于 四月 16, 2026

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